how can i change the emu to run on ss3 instead of avx

RPCS3 uses SSSE3 not SSE3
That being said, there's no toggle for disabling AVX

Any plans to implement other x86 instruction sets, or any easy way to switch between them?
As OP said, the Ryzen series of processors don't handle AVX as well as Intel's CPU's, since they complete one AVX instruction per two clock cycles. Since the Zen uArch processes 128-bit instructions per cycle. (iirc)

(Also, Hi, I'm new here.)